1. Field of Art
The disclosure generally relates to the emulation of circuits, and more specifically to obtaining emulation results.
2. Description of the Related Art
Emulators have been developed to assist circuit designers in designing and debugging highly complex integrated circuits. An emulator includes multiple reconfigurable components, such as field programmable gate arrays (FPGAs) that together can imitate the operations of a design under test (DUT). By using an emulator to imitate the operations of a DUT, designers can verify that a DUT complies with various design requirements prior to fabrication.
One aspect of emulation includes emulating a DUT and retrieving emulation results from the emulator. Emulation results can be analyzed to verify, for example, timing relationships and digital logic operations of the DUT. In one approach, emulation results are transferred to another system for performing analysis. For example, waveforms of the emulation results are generated at another system to graphically represent timing relationships and digital logic operations of the DUT. In advanced processes (e.g., 22 nanometer (“nm”) and below), a DUT may include billions of logic circuits and signals. Emulating such a complex DUT involves transferring an extremely large amount of data including states or values of billions of signals for a large number of clock cycles from the emulator to another system. This places a significant strain on computing resources (e.g., processing power, memory availability) as well as requiring large amounts of time to test a complex DUT. Therefore, conventional emulation environment is inefficient in terms of hardware and communication resources employed for transferring data without slowing down the emulator system.